Chemical mechanical polishing (CMP) is a technique which has been conventionally used for the planarization of semiconductor wafers. For example, see U.S. Pat. No. 5,099,614, issued in March in 1992 to Riarai et al; U.S. Pat. No. 5,329,732 issued July 1994 to Karlsrud et al, and U.S. Pat. No. 5,498,199 issued March 1966 to Karlsrud et al. Furthermore, chemical mechanical polishing is often used in the formation of microelectriconic devices to provide a substantially smooth, planar surface suitable for subsequent fabrication processes such as photoresist coating and pattern definition. A typical chemical mechanical polishing apparatus suitable for planarizing a semiconductor surface generally includes a wafer carrier configured to support, guide, and apply pressure to a wafer during the polishing process, a polishing compound such as a slurry to assist in the removal of material from the surface of the wafer, and a polishing surface such as a polishing pad. In addition, the polishing apparatus may include an integrated wafer cleaning system and/or an automated load/unload station to facilitate automatic processing of the wafers.
A wafer surface is generally polished by moving the surface of the wafer to be polished relative to the polishing surface in the presence of a polishing compound. In particular, the wafer is placed in a carrier such that the surface to be polished is placed in contact with the polishing surface, and the polishing surface and the wafer are moved relative to each other while slurry is supplied to the polishing surface.
Chemical mechanical polishing may also be used to form microelectronic features. For example, a conductive feature such as a metal line, conductive plug, or the like may be formed on a surface of a wafer by forming trenches and vias on the wafer surface, depositing conductive material over the wafer surface and into the trenches and vias, and removing the conductive material on the surface of the wafer using chemical mechanical polishing, leaving the vias and trenches filled with conductive material. The conductive features often include a barrier material to reduce unwanted diffusion of the conductive material and to promote adhesion between the conductive material and any adjacent layer of the circuit.
Aluminum is often used to form conductive features because its characteristics are compatible with conventional deposition (e.g. chemical vapor deposition) and etch (e.g., reactive ion etch) techniques. While the use of aluminum to form conductive features is adequate in some cases, the use of aluminum in the formation of conductive features becomes increasingly problematic as the size of the conductive feature decreases. In particular, as the size of the conductive feature decreases, the current density through the feature generally increases, and thus the feature becomes increasingly susceptible to electromigrations; i.e., the mass transport of metal due to the flow of current. Electromigration may cause short circuits where the metal accumulates, open circuits where the metal has been depleted, and/or other circuit failures. Similarly, increased conductive feature resistance may cause unwanted device problems such as access power consumption and heat generation.
Recently, techniques have been developed which utilize copper to form conductive features because copper is less susceptible to electromigration and exhibits a lower resistivity than aluminum. Since copper does not readily form volatile or soluble compounds, the copper conductive features are often formed using damascene. More particularly, the copper conductive features are formed by creating a via within an insulating material, depositing a barrier layer onto the surface of the insulating material and into the via, depositing a seed layer of copper into the barrier layer, electrodepositing a copper layer onto the seed layer to fill the via, and removing any excess barrier metal and copper from the surface of the insulating material using chemical and mechanical polishing. During the electrodeposition process, additives such as leveling agents may be added to the plating bath to reduce the formation of voids within the conductive features.
Forming copper conductive features according to the method described above can be relatively expensive, in part because each material deposition and removal step is typically carried out using dedicated equipment. U.S. Pat. No. 6,176,922, issued to Talieh on Jan. 23, 2001, discloses an apparatus for both electroplating and polishing copper. The apparatus disclosed includes a wafer carrier having a cathode electrode contact that contacts the surface of the wafer to be polished. Unfortunately, the apparatus shown in Taleih is problematic is several ways. In particular, a film deposited using the apparatus of Taleih may be undesirably non-uniform because the cathode electrode contacts the wafer in a limited number of fixed locations about the perimeter of the wafer. Such a cathode contact configuration may lead to increased deposition about the perimeter of the wafer, i.e., in the areas proximate to the cathode contact, and thus lead to non-uniform deposition of the conduct film. Furthermore, wafer areas in contact with the cathode generally cannot include active devices.
As stated previously, the CMP machine typically includes a wafer carrier configured to hold, rotate, and transport a wafer during the process of polishing or planarizing the wafer. During the planarizing operation, a pressure applying element (e.g., a rigid plate, a bladder assembly, or the like) that may be an integral part of the wafer carrier, applies pressure such that the wafer engages a polishing surface with a desired amount of force. The carrier and the polishing surface are rotated, typically at different rotational velocities, to cause relative lateral motion between the polishing surface and the wafer and to promote uniformed planarization. The polishing surface generally comprises a horizontal polishing pad that may be formed of various materials described further hereinbelow. The hardness and density of the polishing pad depend on the material that is being polished, and an abrasive slurry may also be applied to the polishing surface which acts to chemically weaken the molecular bonds at the wafer surface so that the mechanical action of the polishing pad and slurry abrasive can remove the undesirable material from the wafer surface.
Unfortunately, the CMP process tends to leave stresses in the worked workpiece leading to subsequent cracking and shorting between metal layers. Furthermore, the CMP process may result in sheering or crushing of fragile layers. This process also has a tendency to cause dishing in the center of wide metal features, such as trenches and vias, oxide erosion between metal features, and dielectric oxide loss.
Electrochemical removal is an attractive alternative to CMP because no physical mechanical polishing takes place and therefore significant mechanical stresses are not imparted to the workpiece. Consequently the integrity of the devices is not compromised. Furthermore, electrochemical removal is less likely to cause dishing, oxide erosion, and oxide loss of the dielectric layer. Electrochemical removal is based on electroetching and electrochemical machining; that is, the removal of a thin layer of metal from a substrate through the action of an electrical solution and electricity. For example, if two electrodes, an anode and a cathode, are emerged in a liquid electrolyte and are wired so as to permit a potential difference between the electrodes, metal atoms in the anode are ionized by the electricity and go into the solution as ions. Depending on the chemistry of the metals and salt, the metal ions from the anode either plate the cathodes, fall out as precipitate, or remain in solution.
The above referred to polishing plate or pad may be a blown urethane polishing pad of the type commercially available from Rodel Inc. of Phoenix, Ariz. and identified as an IC1000. This expanded foam polishing pad contains a large number of voids in the form of small, generally spherical micro-bubbles. Since such polishing pads are first grown in a cake and then sliced to form individual polishing pads, portions of voids or micro-bubbles which have been sliced through appear at the polishing surface creating a surface microtexture. Other known polishing pads may be manufactured from fiber meshes of felts; however, they are still porous containing voids thus likewise exhibiting a surface microtexture.
In the case of a mechanical polishing process, the surface microtexture is advantageous because slurry is captured by the microtexture causing the slurry to engage the surface which assists in the distribution of slurry thereacross. However, in the case of electrodeposition or electroremoval, no actual mechanical polishing takes place. The polishing pad (now more appropriately referred to as a wafer support plate) contacts the wafer surface to distribute electrolyte thereacross but does not perform any actual mechanical polishing. The wafer support plate also acts as an insulator between the anode and cathode of the electrodeposition/electroremoval apparatus.
The use of known polishing pads (e.g. a Rodel IC1000) in an electrodeposition or electroremoval process creates certain problems. For example, machining of the polyurethane pad to produce the required anode holes, cathode holes, and electrolyte distribution channels or grooves creates localized heating which in turn produces localized hardness (e.g. at the edges of the holes). These regions of localized hardness can cause scratching of the wafer surface. In addition, the above referred to microtexture on the wafer support surface caused by the presence of pores, voids, and bubbles in the material from which the wafer support plate is manufactured is not conducive to an even distribution of electrolyte in an electrodeposition or electroremoval process. Further, the porosity of traditionally used materials may cause electron leakage from cathode to anode.
In view of the foregoing, it should be appreciated that it would be desirable to provide improved methods and apparatus for the electrochemical deposition and/or removal of a metal on a workpiece such as a semiconductor wafer. It should also be appreciated that it would be desirable to provide a void-free wafer support plate which presents a substantially smooth, low coefficient of friction, wafer contact surface while at the same time providing even distribution of electrolyte on a wafer surface during an electrodeposition or electroremoval process.